PLC Instruction Set

An Overview of PLC Instructions Types

There are various types of instructions that are available in a PLC. The instruction set will vary depending on the brand and type of processor you are working with. For example, the classic Allen-Bradley PLC-5 has 9 types of instructions:

1. Bit level – Bit level instructions include: examine on, examine off, output energize, output latch, output unlatch and one shot. These are the most common instructions used for simple ladder diagrams and are handled as relay logic. Combinations of examine on and examine off instructions with branching appear as NO and NC contacts respectively. The output instructions appear as coils in the diagram.
2. Word level – There are over twenty word level instructions that use 16-bit words for calculations, comparisons, conversions and masking. These instructions appear as blocks, identifying the word addresses, and the desired function, activated by one or more bit level instructions.
3. File level – These instructions allow the use of multiple word files to perform file arithmetic and logic, file search and compare, sequencer output, sequencer input, and sequencer load functions.
4. Timers & Counters – Timers and counters include timer on-delay, timer off-delay, retentive timer, up-counter, down counter, and reset. These instructions reserve three 16-bit words (48-bits in total) for their respective functions in a special file. They also appear as block instructions that display time-base, preset values and accumulated values as the instruction operates. These instructions are controlled by bit level instructions.
5. Program control – there are ten program control instructions used for such functions as subroutines, label, jump, immediate inputs and outputs and related actions. These appear as block instructions in the ladder diagram.
6. Communications – Three instructions allow block transfer reads and writes, and message handling. These allow the exchange of data between remote processors and I/O racks.
7. Shifting – Five instructions allow manipulation of bits within words. These include the ability to perform first-in, first-out (FIFO) functions.
8. Diagnostic – Three instructions include file bit compare, diagnostic detect and data transitional functions.
9. Miscellaneous – PID which provides a proportional, integral, derivative control that can be tuned to match process requirements.

Bit Level Instructions

This is the most common instructions found in simpler PLC installations. These instructions follow the general pattern of the ladder diagrams related to related logic.

Examine on is often abbreviated XIC, appears as a NO contact. If the element is not energized, the contact appears on the screen with normal intensity. When energized, the contact will appear intensified, indicating that we have a conducting element in the ladder diagram. The element can be an input, or derived from an output or relay function within the program.

Examine off, abbreviated XIO, appears as a NC contact. If the element is not energized, the contact will appear as a conducting element, intensified on the screen. If it changes to an energized state, the element will revert to lower intensity, appearing as a non-conducting element in the ladder diagram.

Output energize (OTE) is the last element on the right side of the ladder diagram, and symbolizes a coil. When all the necessary conditions in the rung are “true” i.e. conducting, the output will appear intensified. This will turn ON any load that is connected to its terminal in the I/O rack. We can add as many XIO and XIO instructions as may be required by the program, addressed from this output, to show its status.

Output addresses that are not assigned to an I/O rack can be used as internal relays within the program. This is helpful in cases where a complex set of conditions are necessary in many rungs of logic. You can build one complex rung, terminating with a relay address, then simply examine the relay’s status with a single ‘contact’ in each rung that requires its logic, simplifying the program and saving the memory.

Output latch (OTL) and Output unlatch (OTU) instructions are always used in pairs with the same address. When conditions are turn in an OTL rung, the output will turn ON, and remain on after the conditions turn false (OFF).  A separate rung must be used to activate an OUT (unlatch), with the same address, to reset the original OTL to an unlatched condition.

One shot (ONS) outputs only stay ON for one scan after the rung is true. This provides a pulse to control a following rung. The rung must go false before another pulse can be repeated. This is a helpful instruction, often utilized to provide “triggering” signal when an object first covers a limit switch, without holding a maintained signal that might interfere with following logic. To put it in other words, you can have a single short pulse from an input that may be held energized for a sustained time interval.

Word Level Instructions

Word level instructions are primarily used to work with numbers and shift registers. Analog input and output values are usually stored and manipulated as words. The following sections covers short descriptions of word level instructions:

Compute (CPT) instruction performs copy, arithmetic, logical and conversion operations. It is an output instruction that performs operations you define in an expression, and writes the result into a destination address. It can copy data from one address to another and convert the source data to the data type specified in the new address for example, convert octal number to hexadecimal number.

Add (ADD) instruction adds one value to another value, and places the result in a destination address.

Subtract (SUB) instruction subtracts one value from another value, and places the result in a destination address.

Multiply (MUL) instruction multiplies one value by another value, and places the result in a destination address.

Divide (DIV) instruction divides one value by another value, and places the result in a destination address.

Square Root (SQR) instruction takes the square root of a value, and place the result in a destination address.

Negate (NEC) instruction is used to change the sign (+or-1) of a value.

BCD to Integer (FRD) instruction converts a BCD value to an integer value.

Integer to BCD (TOD) instruction converts an integer value to a BCD value.

Move (MOV) instruction copies a value from the source address to a destination every scan. This is often used to pick up a continuously changing input address and place it into a continuous computation address.

Move with mask (MVM) instruction is similar to MOV except the MVM passes through a mast to extract bit data from an element that may contain bit and word data.

Clear (CLR) instruction is used to reset all bits in a word to zero.

Bit inversion (NOT) instruction performs a NOT operation using the bits in a source address. It inverts the status of bits, that is, a 1 becomes a 0, and vice versa.

Bit-wise and (AND) instruction performs an AND operation using the bits in two source addresses. The result is placed in a destination address.

Bit-wise or (OR) instruction performs an OR operation using the bits in two source addresses. The result is placed in a destination address.

Bit-wise exclusive or (XOR) instruction performs an exclusive OR operation using bits in two source address. The result is placed in a destination address. A (1) is placed in the destination address if corresponding bits in source addresses are not equal.

Compare (CMP) is an input instruction that compares values and performs logical comparisons. When comparison is true, the rung becomes true.

Equal to (EQU) is an input instruction that test whether two values are equal, and makes the rung true when the values are equal.

Not equal to (NEQ) is an input instruction that tests whether two values are not equal, and makes the rung true when the values are not equal.

Less than (LES) is an input instruction that tests whether one value is less than a second value, and makes the rung true when the conditions are true.

Less than or equal to (LEQ) is an input instruction that test whether one value is equal to or less than a second value, and makes the rung true when the conditions are true.

Greater than (GRT) is an input instruction that tests whether one value is greater than a second value, and makes the rung true when the conditions are true.

Greater than or equal to (GEQ) is an input instruction that tests whether one value is equal to or greater than a second value, and makes the rung true when the conditions are true.

Circular limit test (LIM) is an input instruction that tests whether one value is within the limits of two other values. Rung is set true when conditions are true.

Masked equal to (MEQ) is an input instruction that passes two values through a mask, and tests whether they are equal. Rung is set true when condition is true.

File Level Instructions

File arithmetic and logic (FAL) is an output instruction that performs copy, arithmetic, logic, and function operations on the data stored in files. It does the same operations as CPT instruction, except FAL works with multiple words, rather than single words.

Sequencers

Sequencer instructions are used to control automatic assembly machines that have consistent and repeatable operating using 16-bit data.

Sequencer output (SQO) is an output instruction that steps through a sequencer file of 16-bit output words whose bits have been set to control various output devices; when the rung goes from false to true, the instruction increments to the next (step) word in the sequencer file.

Sequencer input (SQI) is an input instruction used to monitor machine operating conditions for diagnostic purposes by comparing 16-bit image data, through a mask, with data in a reference file.

Sequencer load (SQL) is an output instruction used to capture reference conditions by manually stepping the machine through its operating sequencers and loading I/O or storage data into destination files.

Timer and Counter Instructions

Timers and counters are normally shown in the position of outputs in the PLC print-outs. They appear as block instructions and are controlled by XIO, XIC, or other contacts in their respective rung of logic.

The done (DN) bits of timers and counters are energized when timing or counting values match the preset values, and are used as contacts in other rungs are needed.

Timers also have a Timer timing (TT) bit that is energized whenever timing is in progress. Energized bit (EN) is true (ON) whenever the rung is true as illustrated in the figure below:

Timer on-delay (TON) will have a selectable time base (e.g. 0.01, 0.1, 1.0 sec), a selectable preset showing the number of increments of the time base to be used for the time delay, and the accumulated value while the timer is running. When the accumulated value equals the preset, the DN bit will turn ON.

Timer off-delay (TOF) will have the similar functions, but will turn ON when the rung is true, and hold its DN bit energized for the preset time after its rung turns false (OFF).

Retentive timer (RTO) operates similar manner to a TON, but accumulates time whenever its rung is true, holds the value when the rung becomes false, and then resumes timing where it left off each time the rung is true. When the accumulated value equals the preset, the DN bit is energized and held on. A separate rung must be provided to control a Reset instruction (RES) having the same address as the RTO. When the RES instruction is true, it resets the RTO accumulated value to zero.

Count up (CTU) and Count down (CTD) instructions count up or down one increment each time their respective rung is energized. A DN bit is set when the accumulated value is equal to the preset. CTU and CTD instructions can be used in pairs, having the same address. A RES instruction with the same address is used to reset the accumulated value to zero, similar to the RTO instruction. An overflow bit (OV) is turned ON if the count exceeds the preset of the counter. All these instructions can be utilized where required, anywhere in the program

Related:The Basics of Ladder Diagrams for Programming PLCs

Program Control

Immediate input (IIN) is an output instruction used to update a word of input image bits before the next normal update, by interrupting program scan momentarily.

Immediate output (IOT) is an output instruction used to update an I/O group of outputs before the next normal update, by interrupting program scan momentarily.

Master control reset (MCR) instructions are used in pairs to create program zones that turn OFF all non-retentive outputs in the zone. Allows one to enable or inhibit segments of the program as might be required in process applications.

Jump (JMP) is an output instruction that allows one to skip portions of the ladder logic. It is used with LBL which designates the destination of the jump.

Label (LBL) is an input instruction that identifies the destination of a JMP instruction.

Jump to subroutine (JSR)

Subroutine (SBR)

Return from subroutine (RET)

JSR, SBR, and RET instructions direct the processor to go to a separate subroutine file within the ladder processor, scan that subroutine file once, and return to the point of departure.

Temporary end (TND) is an output instruction that returns the scan to die beginning of the program. It is often inserted progressively through the program for debugging and troubleshooting a program.

Always false instruction (AFI) is an input instruction that can be temporarily used to disable a rung during testing and troubleshooting.

Communications Instructions

Block transfer read (BTR) is an output instruction that can transfer up to 64 words at a time from an I/O chassis or supervisory processor.

Block transfer write (BTW) is an output instruction that can transfer up to 64 words at a time to an I/O chassis or supervisory processor.

Message (MSG) is an output instruction used to send “packets” of up to 1000 elements of data between processors on a data highway network.

Shifting Instructions

The following instructions are output instructions used to move bits in various modes for shift register operations. They can be used to track product as it moves down a processing line.

Bit shift left (BSL) instruction is used to move bits one address left. Bit shift right (BSR) instruction is used to move bits one address right. Bitfield distributor (BTD) is used to move bits within a word.

Fife load (FFL) instruction is used to load a first in, first out file, storing words in a “stack” used with FFU.  

Fife unload (FFU) instruction is used to provide first in, first out operation, removing words from an FFL “stack”.

Life load (LFO) used to load a last in, first out file, storing words in a “stack”, used with LFU.

Life unload (LFU) used to provide last in, first out operation, removing words from an LFO “stack”.

Diagnostic Instructions

File bit compare (FBC) instruction is used to compare I/O data against a known, good reference, and record mismatches.

Diagnostic detect (DDT) instruction is used to compare I/O data against a known, good reference, record mismatches, and update the reference file to match the source file.

Data transitional (DTR) is used to pass source file data through a mast and compare to reference data, then write the source word into the reference address of the next comparison.

Recommended Resource: Beginner’s guide to PLC programming – A Transition from Relay systems to PLCs

Miscellaneous Instructions

Proportional, Integral, Derivative (PID) is a complex instruction used for process control for such quantities such as temperature, pressure, flow rate and fluid levels, The inputs are usually brought in through analog-to-digital (A/D) converters, and processed as integer numbers. After comparative calculations are made, the integer numbers are sent out as outputs to digital-to-analog (D/A) converters for corrective control.

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