Phase-Locked Loops (PLL) – Features, Operation & Applications

Feb 7, 2024

—

John Mulindi

in Telecommunication Systems

Contents

1 Features of a Phase-Locked Loop (PLL)
2 Operation of a Phase-Locked Loop
3 Applications of Phase-Locked Loops

Features of a Phase-Locked Loop (PLL)

A phase-locked loop (PLL) is a form of a servo system which consists of a phase detector, low-pass filter and voltage controlled-oscillator (VCO) as illustrated in the block diagram below. The phase detector compares the phase of the VCO with the incoming reference signal, giving an output proportional to the difference in phase. This is then filtered to remove unwanted high-frequency components, and the output from the low-pass filter is used to control the frequency of the VCO, locking it to the incoming signal.

It is important to note that, the phase is the integral of frequency, and there is only a difference in frequency between two signals when the phase is changing between them. When the VCO signal is locked to an incoming reference signal, a steady dc error voltage is applied to the VCO, and this is proportional to a constant phase difference between the two signals. Thus, there is no actual phase change and the frequency of the VCO must be precisely the same as the reference signal.

Operation of a Phase-Locked Loop

The diagram below shows a basic PLL block diagram that can be assembled discretely or on an integrated chip. It demonstrates what is referred to as a filter tracking circuit.

Fig: Phase-locked loop (PLL) Block Diagram

Let’s consider a case where there is no applied signal to the circuit. There will be no error voltage at the output of the phase detector, and the VCO will run at its natural or free-running frequency (f₀). If an input is applied with frequency fs, there will be an error voltage generated by the phase detector which is proportional to the phase difference between the two signals. This output consists of sum and difference signals and is filtered through a low-pass filter to remove unwanted frequencies. The output from the low-pass filter is the difference frequency, which is amplified and applied to the control point on the VCO. The error voltage is such that it reduces the phase, hence the frequency difference between the two signals. Once the loop has locked, the frequency of the oscillator will be precisely be the same as that of the reference, but this will be a net phase difference which is required to generate the required error voltage to keep the oscillator running at the reference frequency.

When no signal is applied to the PLL it will have no error voltage applied to the oscillator. If a signal is applied and swept towards the oscillator frequency, the phase detector will generate the sum and difference frequencies. If the difference frequency which produces the error voltage falls outside the pass band of the low-pass filter no correction will be applied to the oscillator but as the reference is swept nearer the oscillator frequency there reaches a point where it does fall within the pass band and causes the loop to lock. Thus, what is referred to as the capture range of the loop can be defined as the frequency range over which it can gain acquisition. This range depends largely on the characteristics of the first-order low-pass filter. Once the PLL has achieved capture, it can maintain lock with the input signal over a wider frequency range called the lock range.